This application claims the priority of Korean Patent Application No. 2003-97756, filed on Dec. 26, 2003, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to a transconductor, and more particularly, to a transconductor, of which direct current (CD) offset component is cancelled and a mismatch characteristic is improved.
2. Description of the Related Art
An operational transconductance amplifier (OTA) is a current amplifier that amplifies an applied input voltage and outputs the input voltage as an output voltage in proportion to a transconductance (Gm). In a case where the OTA is applied in a communication system of direct conversion type, a signal of high frequency is converted into baseband signal based on a direct current (DC), and a DC offset largely affects the performances of the system. The DC offset degrades a restoration function of the signal, and causes a wrong operation of the system since it makes an operational point of next stage be a saturation status. Generally, the DC offset may be generated by frequency conversion that is caused by a local oscillator (LO) signal leakage or an interferer leakage such as a time-variant DC-offset, or generated by a non-linear mixer or an asymmetric circuit such as a time-invariant DC-offset.
A low pass filter that is located at a rear end of a receive system in the entire system is largely affected by the DC-offset. Therefore, in order to satisfy a desired bit error ratio (BER), the DC-offset should be eliminated and a clean signal should be transmitted to a final analog/digital converter (ADC). Especially, in a case where the low pass filter is formed of active circuits of the OTA and a capacitor, each of OTA cells should have a performance of eliminating the DC offset so that a DC value of respective node does not become the saturation status, but maintains at a predetermined voltage value even when the DC offset is generated at the previous node.
In a differential circuit structure, a mismatch characteristic may make a signal non-linear, and generate an internal DC offset. Thus, the DC value of output signal can be differentiated, and accordingly, the mismatch of the signal at the next node becomes worse. Therefore, the BER of the entire system may be degraded.
In a superheterodyne system that is conventionally used, the DC offset is small, thus there is no need to use a filter eliminating the DC offset. However, in the direct conversion system for realizing a system on chip (SOC) of lower power consumption, a circuit design for solving the DC offset problem is required.
FIG. 1 is a circuit diagram showing a conventional triode-typed transconductor. In addition, FIG. 2 is a circuit diagram showing a common mode control circuit of FIG. 1 in detail.
Referring to FIG. 1, the conventional transconductor includes triode-typed transconductors M1a, M1b, M1c, and M1d having a dual-pair input vpi1, vmi1, vpi2, and vmi2 structure, and a gain boosting amplifier. The gain boosting amplifier includes transistors M2a and M2b, and an amplifier A1. Transistors M3a, M3b, M4a, and M4b are loads to supply predetermined electric currents, and an amplifier A2 increases output resistance in connection with the transistors M3a and M3b. In addition, an amplifier Am that is a common mode control circuit compares a constant output voltage and a sub-output voltage to a common mode voltage Vcm to control the electric currents of the transconductors M1a, M1b, M1c, and M1d through the transistors M4a and M4b so that the two output voltages are corresponded to the common mode voltage Vcm.
Referring to FIG. 2, the amplifier Acm, that is, the common mode control circuit includes transistors M100, M101, M102, M103, M104, M105, M106, M107, and M108. The transistors M100 and M101 generate electric current of a predetermined magnitude by mirroring a current source of a bias circuit. The transistors M102 and M103 and the transistors M104 and M105 form differential pair amplifiers, respectively. The transistors M106 and M108 perform as loads. The transistor M107 includes a diode connection to transmit the current generated by the transistors M100 and M101 and supply the fixed current to a core of the transconductor. Two output voltages vo+ and vo− of the transconductor are compared to the common mode voltage Vcm through two differential pair amplifiers M102 and M103, and M104 and M105, respectively. The differences of compared voltages is amplified and added to form a gate voltage VMFB of the transistor M107. The gate voltage CMFB is a DC component value without an alternating current (AC) component, and the DC component value is inverted and amplified through the transistors M4a and M4b shown in FIG. 1 so that the output DC value can be corresponded to the common mode voltage Vcm.
However, in the above case, although the output voltage can be maintained constantly, the DC offset generated in the input voltages vpi1, vmi1, vpi2, and vmi2 cannot be eliminated. In addition, in a case where a mismatch in the output voltage is generated due to a change of device size after performing processes, the mismatch cannot be eliminated. Since the filter generally has a structure, in which a plurality of transconductors are connected in parallel and serial to each other, if the output DC voltage of first transconductor, that is, the input DC value of the next transconductor, is not coincided with the output DC voltage of the next transconductor, the filter performs a wrong operation and makes the next circuit saturated.